Damascene processing is a method for forming metal lines on integrated circuits. It is often a preferred method because it requires fewer processing steps than other methods and offers a higher yield. Through silicon vias (TSV's) are sometimes used in conjunction with Damascene processing to create 3D packages and 3D integrated circuits (IC), by providing interconnection of vertically aligned electronic devices through internal wiring that significantly reduces complexity and overall dimensions of a multi-chip electronic circuit.
Conductive routes on the surface of a circuit formed during Damascene processing or in TSV's are commonly filled with copper. Unfortunately, copper presents special challenges because it readily diffuses into silicon oxide and thus reduces silicon's electrical resistance even at very low doping levels. Therefore in typical Damascene or TSV processing a conformal diffusion barrier layer is first deposited on silicon surfaces followed by a conductive seed copper layer on the diffusion barrier to aid subsequent electroplating of a copper fill layer that fills the trenches, vias and holes. This process presents certain challenges, one of which is the relatively high cost of materials, another challenge is step coverage of the barrier. Tungsten is sometimes preferred for filling TSV's, but also raises particular processing challenges.
What is needed are improved methods and materials for semiconductor processing, particularly for filling Damascene and TSV features.